Sr Engineer, Silicon Validation

San Jose, CA

About the role

Position: Sr. Engineer, Silicon Validation Location: San Jose, CA Job Id: 740 # of Openings: 0 Sr. Engineer: Silicon Validation Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by industry giants like NVIDIA, AMD and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. In this role, you will own the silicon bringup and validation of our optical chiplets. You will execute post-silicon bringup and characterization across SerDes, photonic, and mixed-signal blocks, building the test infrastructure and automation that ensures our products meet and exceed specification before customer deployment. Essential Functions Perform initial power-on and bringup of new silicon tape-outs, including boot sequence validation, clock/power domain verification, and initial functionality tests. Perform functional and electrical characterization of high-speed SerDes interfaces, photonic control blocks, and mixed signal blocks. Define and execute test plans at both block and chip level. Use lab test equipment (BERT, oscilloscope/DCA, OSA, signal generators) to characterize signal integrity, eye diagrams, BER, jitter, and optical performance metrics. Develop and maintain Python-based test scripts and automation frameworks for regression and characterization testing. Systematically investigate silicon anomalies and failures; collaborate with design and firmware engineers to develop and verify fixes. Write clear test plans, validation reports, and signoff documentation; communicate findings to cross-functional teams. Partner with firmware, analog/mixed-signal, digital, and systems engineering teams across the full product development cycle. Basic

Qualifications Bachelor's degree in Electrical Engineering or related field with 3+ years of relevant industry experience. Hands-on experience with post-silicon bringup and validation of high-speed SoC or mixed-signal devices. Working knowledge of SerDes PHY operation and characterization, including NRZ and/or PAM-4 signaling. Proficiency with lab equipment used for high-speed characterization: BERT, oscilloscopes, signal analyzers. Proficiency in Python for test scripting and data analysis. Strong troubleshooting skills and ability to work independently in a lab environment. Proficiency with version control (Git) and software development environments. Preferred

Qualifications Experience with photonic device or electro-optic system characterization and validation. Familiarity with optical measurement equipment (OSA, optical power meters, lasers). Experience with high-speed serial standards: Ethernet (100G+), PCIe, OIF CEI. Experience with board-level debug and hardware bring-up using JTAG or I2C/SPI interfaces. Salary Range: NOTE TO RECRUITERS: Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t send candidates to Ayar Labs, and do not contact our managers. Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply. Apply for this Position Go back to the job list

About Ayar Labs

Ayar Labs uses silicon photonics and microring-based architectures to increase bandwidth, reduce latency, and improve power efficiency in accelerator and XPU environments. The company’s TeraPHY optical engine integrates UCIe-based optical chiplets to enable high-throughput, low-power data transfer across extended distances within and between compute systems. Its SuperNova external light source provides multi-wavelength laser output designed for scalable, standards-based deployment. Ayar Labs supports disaggregated memory and scale-up architectures, enabling AI hardware systems to operate with higher interconnect density and accelerator utilization.

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Job details

Location

San Jose, CA

Company

NameAyar Labs
IndustryAI Infrastructure
Team Size3

Funding

Total raised

$870M

Last stage

Series E

Investors

NNeuberger Berman
AAdvent International
LLight Street Capital
PPlayground Global
Insight Partners

Founders

Mark Wade

Mark Wade

Co-Founder & CEO

LinkedIn
Chen Sun

Chen Sun

Co-Founder & VP of Silicon Engineering / Chief Scientist

LinkedIn
Vladimir Stojanovic

Vladimir Stojanovic

Co-Founder & CTO

LinkedIn

What happens next.

No applications, no recruiter spam. Just the intro.

01

Confirm the fit

A few questions to make sure this role is the right shape for you. Two minutes.

02

I pitch you to the company

I write the intro, send it to the founder, and handle the back-and-forth.

03

A meeting lands on your calendar

If they’re a yes, I book the chat. You show up — that’s the whole job-hunt.