Analog Layout Engineer - Careers At TETRAMEM INC --> Career Opportunities with TETRAMEM INC A great place to work. Careers At TETRAMEM INC Share with friends or Subscribe! At TetraMem, we are redefining the future of AI with our groundbreaking innovations in In-Memory Computing. Leveraging world-record multi-level RRAM technology, we deliver highly efficient solutions for AI computations, enabling superior performance and energy efficiency across applications ranging from edge devices to data centers. Our talented team of engineers and industry-leading executives drives this progress, making TetraMem a leader in advanced memory technologies. If you are passionate about cutting-edge technology and thrive in a fast-paced, collaborative environment, TetraMem is the place for you. Join our global team to shape the future of AI computations and sustainable technology solutions while working at the forefront of innovation. Together, we can make a lasting impact. Are you ready for new challenges and new opportunities? Join our team! Current job opportunities are posted here as they become available. Subscribe to our RSS feeds to receive instant updates as new positions become available. --> --> --> Back To Openings Analog Layout Engineer Department: IC Design - Analog Design Location: San Jose, CA START YOUR APPLICATION Job Summary: We are seeking an experienced Analog Layout Engineer to join our team. The Analog Layout Engineer will be responsible for designing and implementing analog and mixed-signal layout designs for integrated circuits. This role requires a strong understanding of analog design principles and the ability to work closely with the design team to meet project goals.
Responsibilities: Lead a team of layout engineers to produce complex analog and mixed-signal blocks with high-quality layout Collaborate with project managers and design engineers to understand project
requirements Drive critical floor-planning decisions and key layout methodology Ensure that all designs meet project
requirements and adhere to design guidelines Review and approve final layout designs for production Stay up-to-date with industry trends and advancements in design software and techniques Attend project meetings, presentations, and other events as needed
Requirements: B.S. EE and 8+ years of relevant industry experience or equivalent Experience in analog and mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes Proficiency in industry-standard design software, such as Cadence Virtuoso, Calibre DRC, LVS Strong understanding of layout design principles and best practices Excellent communication, collaboration, and leadership skills Ability to manage multiple projects simultaneously while maintaining attention to detail Demonstrated ability to work independently and as part of a team Strong problem-solving and decision-making skills Salary Range: $110,000 - $300,000 / year START YOUR APPLICATION Visit Our Home Page © 2026 TETRAMEM INC Applicant Tracking System Powered by -->
Salary
$110,000 - $300,000
Location
San Jose, CA
Experience
8+ years
Last stage
Seed
Investors
Qiangfei Xia
Co-Founder, President & CEO (also listed as Co-Founder and Advisor)
J. Joshua Yang
Co-Founder, Chairman of the Scientific Advisory Board
No applications, no recruiter spam. Just the intro.
A few questions to make sure this role is the right shape for you. Two minutes.
I write the intro, send it to the founder, and handle the back-and-forth.
If they’re a yes, I book the chat. You show up — that’s the whole job-hunt.