Senior FPGA Verification Engineer

the team Architect UVM verification environments (drivers, monitors, predictors, scoreboards) for AMD (Xilinx) FPGA/SoC designs and establish patterns others on

the team follow Develop verification plans with traceability to system and hardware

requirements Author SystemVerilog Assertions (SVA) for protocol compliance and design intent checks Build functional coverage models and drive code coverage analysis to closure Develop constrained-random and transaction-level test sequences to maximize coverage and uncover corner-case bugs Establish and maintain regression suites, tracking coverage metrics and verification progress Debug failures using waveform tools and simulation logs at the HDL and system level Collaborate with design engineers on RTL reviews, bug resolution, and micro-architecture refinement Support hardware validation and board bring-up on target platforms Ensure verification meets DO-254 and relevant safety standards Author verification closure reports and coverage analysis summaries REQUIRED

QUALIFICATIONS Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field 7+ years of experience in FPGA/ASIC verification Proficient in SystemVerilog, UVM methodology and SVA, with experience contributing to and extending UVM testbenches Object-oriented programming principles Industry simulators (Questa, VCS, Xcelium, or Vivado) Git-based collaborative workflows including code review Linux development environments SVUnit or equivalent unit-testing frameworks Formal verification or CDC verification tools Verification automation scripting (Python, Tcl, Makefile) Track record owning verification closure on a production or flight program end-to-end Experience defining verification methodology and mentoring engineers Strong communication and teamwork skills Eligible to obtain and hold a U.S. Secret security clearance PREFERRED

QUALIFICATIONS 10+ years of experience in FPGA/ASIC verification Master’s degree in Electrical Engineering, Computer Engineering, or related field DO-254, avionics verification standards for UAS, and safety-critical verification processes Digital interfaces: Ethernet, PCIe, JESD204C, MIL-STD-1553, SPI SoC and ARM-based embedded platforms Verification automation, CI/CD integration, and Nix-based build environments UVM base-class and framework library development DO-254 DAL A/B artifact ownership and experience supporting DER or customer audits US Salary Range $146,000 — $194,000 USD The salary range for this role is an estimate based on a wide range of

compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril's total

compensation package. Additionally, Anduril offers top-tier

benefits for full-time employees, including:

Benefits At Anduril, we invest in our people. Our comprehensive, competitive

benefits package (available at little to no cost to employees) ensures you’re supported in health, recovery, and whatever comes next. For more information, Explore Our

Benefits . Protecting Yourself from Recruitment Scams Anduril is committed to maintaining the integrity of our Talent acquisition process and the security of our candidates. We've observed a rise in sophisticated phishing and fraudulent schemes where individuals impersonate Anduril representatives, luring job seekers with false interviews or job offers. These scammers often attempt to extract payment or sensitive personal information. To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind: No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates. Please always verify communications: Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address. Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency. If you suspect any suspicious activity, please verify the agency's authenticity by reaching out to [email protected] . Exercise Caution with Unsolicited Outreach: If you receive any communication that appears suspicious, contains grammatical errors, or makes unusual requests, do not engage. Always confirm the sender's email domain is @anduril.com before providing any personal information or clicking on links. What to Do If You Suspect Fraud: Should you encounter any questionable or fraudulent outreach claiming to be from Anduril, please report it immediately to [email protected] . Your proactive caution is invaluable in protecting your personal information and upholding the security and trustworthiness of our recruitment efforts. Data Privacy To view Anduril's candidate data privacy policy, please visit https://anduril.com/applicant-privacy-notice/ . By submitting your application, you consent to Anduril Industries using a third-party service provider to conduct pre-employment risk, integrity, and due diligence screening and assessing potential risks as part of your application process. This third-party service provider provides risk-intelligence services that may include analysis of sanctions and watchlists, adverse media, public-record information, and other lawful open-source or commercial data sources. This third-party service provider does not act as a consumer reporting agency. Use of this provider helps to ensure compliance with applicable laws and protect technology, intellectual property, and organizational security.

A meeting lands on your calendar

If they’re a yes, I book the chat. You show up — that’s the whole job-hunt.