About the role
Company Overview Ambiq is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions. Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications. Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology. We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency. At Ambiq, we live by five values: Innovate. Collaborate. Focus. Learn. Achieve. If that's you, join us — the intelligence everywhere revolution starts here. This role will be on-site 5 days a week in NW Austin. Scope The Staff Power Validation Engineer is a senior technical individual contributor responsible for defining and executing power validation strategies for Ambiq's next-generation ultra-low-power SoCs. Reporting to the Senior Manager, Silicon Validation Engineering, this role serves as the technical expert for post-silicon power validation, characterization, and optimization. Working closely with Architecture, Design, Verification, Firmware, Systems Engineering, and Product Engineering, the Staff Engineer will develop scalable validation methodologies, create advanced automation frameworks, and help deliver industry-leading power efficiency across multiple product families. This position combines deep hands-on technical expertise with cross-functional technical leadership, influencing product architecture, validation methodology, and power optimization throughout the silicon development lifecycle. Key Re sponsibilities Lead power validation, characterization, and optimization for complex mixed-signal SoCs and edge AI devices. Develop validation methodologies, automation frameworks, and reusable software tools for power analysis and characterization. Design and execute validation plans covering system-, subsystem-, and block-level power behavior. Develop embedded firmware and automation software for silicon bring-up, current profiling, and data collection. Partner with Architecture, Design, Verification, Firmware, Systems, and Product Engineering teams to optimize power performance and resolve complex silicon issues. Design validation hardware and specify laboratory equipment for precision power measurement and ultra-low-current characterization. Analyze power behavior across operating modes, sleep states, AI workloads, and peripheral activity. Mentor engineers and provide technical leadership on power validation best practices. Required
