About the role
Founded in 2015, Shield AI is a venture-backed defense-tech company with the mission of protecting service members and civilians with intelligent systems. Its products include Hivemind autonomy software and V-BAT and X-BAT aircraft. With offices and facilities across the U.S., Europe, the Middle East, and Asia-Pacific, Shield AI’s technology actively supports operations worldwide. For more information, visit www.shield.ai . Follow Shield AI on LinkedIn , X , Instagram , and YouTube . Job Description: We are seeking a highly motivated FPGA Design Engineer with experience developing high-performance digital designs. The ideal candidate will be responsible for designing, implementing, verifying, and debugging FPGA-based solutions for complex avionics solutions for cutting-edge Unmanned Aerial Vehicles (UAV). This role requires strong digital design fundamentals, experience with AMD/Xilinx development tools, and the ability to collaborate across hardware, firmware, and software teams. \n
What you'll do: Design and develop FPGA-based communication modules for advanced UAV platforms. Develop solutions that enable precise timing synchronization and redundance across flight controllers. Integrate FPGA solutions with system-level architecture in collaboration with cross-functional engineering teams. Perform synthesis, implementation, timing closure, bitstream generation. Debug, test, and optimize for reliability, latency, and throughput. Collaborate with PCB designers during board bring-up and hardware validation. Contribute to FPGA architecture discussions and help define long-term technical direction within the platform. Participate in design reviews and maintain engineering documentation. Required
qualifications: B.S., M.S, PhD degree in Electrical Engineering, Computer Engineering or STEM (Science, Technology, Engineering, or Mathematics) discipline, such as Aerospace, Mechanical, or Electrical Engineering Strong experience with FPGA design, implementation, and verification using VHDL or SystemVerilog. Demonstrated ability to build reliable, high-performance digital communication systems. Solid understanding of timing closure, clock domain crossing, and system-level integration. Comfortable working in a fast-paced, collaborative environment with evolving