About the role
Job Details: Job Description: Our Senior Component Validation Engineer: Defines, designs, and develops complex radio frequency integrated circuits in IPs and SoCs and creates verification test plans for RF validation. Conducts transistor level feasibility analysis, defines floorplan and layout for RF circuit architecture, creates test benches, and verifies and debugs design to meet the desired specifications. Reviews system specifications and design plans to ensure that designs meet customer needs and is compliant with applicable codes, standards, and regulations. Designs new product concepts and prototypes, creates detailed drawings of circuit designs, and develops and analyzes test procedures. Performs radio signal path and ensures detailed transistorlevel design for transceivers, RFIC blocks, wireless applications (4G, 5G, WLAN, Bluetooth, and GPS). Applies understanding of electromagnetic theory, communication theory, radio frequency test equipment, RF and wireless circuit design, RF system analysis, RF system block characterization, and specification to resolve issues and conduct RF verification.
Qualifications: Master degree in relevant field with a minimum of 7 years of experience in validation of analog/mixed-signal/RF building blocks (ADC/DAC/PLL). Development of measurement automation software and platform firmware for analog/RF IP characterization.
Nice to have: RF background with hands on experience in 5G/6G cellular system measurements is a plus. Excellent oral and written communication skills and ability to contribute and work in a multi-site team setting is also a plus. This position is subject to the collective agreement for workers and employees in the electrical and electronics industry, employment group H: https://www.feei.at/wp-content/uploads/2025/09/caeei-2025-08-25.pdf A higher payment is negotiable depending on your expertise and skills. Prior to entering an employment agreement, the employee will be asked to provide all documents and references to verify any service times of prior employment. Based on provided documents the appropriate number of service years will be credited as prior employment. Job Type: Experienced Hire Shift: Shift 1 (Austria) Primary Location: Austria, Villach Additional Locations: Business group: The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies).