Design and implement digital control subsystems that interface with cryogenic hardware and ASICs Develop timing-critical digital logic for real-time control and feedback of quantum hardware systems Perform field programmable gate array (FPGA) implementation and timing closure, including constraint development and validation of complex designs Design and support high-speed digital interfaces and connectivity across multiple FPGAs and hardware subsystems Work extensively hands-on with hardware, including FPGA platforms, interconnects, and direct integration with cryogenic systems ("the fridge") Define and implement robust electrical interfaces, including considerations for signaling standards, bandwidth, latency, and synchronization Collaborate with cross-functional teams to optimize system-level tradeoffs across digital, analog, and cryogenic domains Support system bring-up, debugging, and validation in laboratory environments Bachelor's degree in Electrical Engineering, Computer Engineering, or related field and 6+ years of technical engineering experience OR Master's degree in Electrical Engineering, Computer Engineering, or related field and 4+ years of technical engineering experience OR Doctorate degree in Electrical Engineering, Computer Engineering, or related field and 1+ years of technical engineering experience OR equivalent experience Ability to leverage artificial intelligence (AI) tools to drive innovation and efficiency (e.g., measurement, performance modeling and analysis, research gathering, day-to-day task automation). Ability to work in an “AI-first” environment using modern AI tools to accelerate discovery through hardware development. Experience with FPGA design, including register-transfer level (RTL) development in Verilog, SystemVerilog, or Very High Speed Integrated Circuit Hardware Description Language (VHDL) Experience designing and debugging timing-critical digital logic in hardware systems Direct experience with FPGA-based hardware platforms, including bring-up, validation, and timing closure for complex designs with multiple clock domains and other performance constraints Thorough understanding of high-speed digital interfaces, including bandwidth, latency, signal integrity, and standard communication protocols Experience with real-time or low-latency digital control systems Experience working with hardware interconnects and system integration, including cables, connectors, multi-board systems, level shifting, voltage domains, and interfaces between digital logic and mixed-signal hardware Experience integrating digital systems with experimental hardware environments, such as cryogenic systems or similar laboratory setups Effective communication, documentation, and cross-team collaboration skills Ability to adapt and operate effectively in a fast-paced research and development environment
Salary
$119,800 - $234,700
Location
Redmond, WA
Total raised
$142.0M
Last stage
Series E
Investors
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