SG ASIC RTLSoC Design Engineer - Careers At TETRAMEM INC --> Career Opportunities with TETRAMEM INC A great place to work. Careers At TETRAMEM INC Share with friends or Subscribe! At TetraMem, we are redefining the future of AI with our groundbreaking innovations in In-Memory Computing. Leveraging world-record multi-level RRAM technology, we deliver highly efficient solutions for AI computations, enabling superior performance and energy efficiency across applications ranging from edge devices to data centers. Our talented team of engineers and industry-leading executives drives this progress, making TetraMem a leader in advanced memory technologies. If you are passionate about cutting-edge technology and thrive in a fast-paced, collaborative environment, TetraMem is the place for you. Join our global team to shape the future of AI computations and sustainable technology solutions while working at the forefront of innovation. Together, we can make a lasting impact. Are you ready for new challenges and new opportunities? Join our team! Current job opportunities are posted here as they become available. Subscribe to our RSS feeds to receive instant updates as new positions become available. --> --> --> Back To Openings SG ASIC RTL/SoC Design Engineer Department: IC Design - Digital Design Location: Singapore, Singapore START YOUR APPLICATION
Responsibilities: Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring robust and efficient designs. Integrate and validate IP blocks within the larger system, ensuring seamless functionality and compatibility. Thoroughly comprehend both internal and external
requirements, conducting Power, Performance, and Area (PPA) analysis to optimize design trade-offs. Collaborate closely with the backend team, participating in RTL coding, implementation, and synthesis stages to ensure successful tapeout. Develop and maintain reusable internal intellectual properties (IPs) tailored for AI and/or in-memory computing applications Provide crucial support for Post-Si testing and validation, diagnosing and rectifying issues to ensure the overall functionality and quality of the product. Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best practices to foster their professional growth. Contribute to design reviews and cross-functional discussions, offering insights and recommendations to enhance product performance and reliability. Stay up-to-date with industry trends and advancements in RTL design methodologies, integrating innovative techniques to improve product quality and efficiency. Collaborate with cross-functional teams, including software, architecture, and verification teams, to achieve cohesive and successful product development and delivery.
Requirements: MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/ SoC/digital design Experience with Verilog and SystemVerilog Experience with VCS, Verdi or other industry standard tools Experience with pre-layout simulation and post-layout simulation Understanding of the design flow. Ability to work with the backend team Familiarity with AMBA APB AXI Protocol Familiarity with RISC/Arm or other core architectures Ability to create innovative architecture and solutions to customer requirement Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team. Experience in one or more of the following areas considered a strong plus: FPGA/ASIC design of image processing system Working knowledge of SoC architectures including CPU, GPU or accelerators Familiarity with: UVM, place-and-route, STA, EM/IR/Power Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team Salary Range: S$80,000 - S$180,000 / year START YOUR APPLICATION Visit Our Home Page © 2026 TETRAMEM INC Applicant Tracking System Powered by -->
Location
Singapore, Singapore
Experience
5+ years
Last stage
Seed
Investors
Qiangfei Xia
Co-Founder, President & CEO (also listed as Co-Founder and Advisor)
J. Joshua Yang
Co-Founder, Chairman of the Scientific Advisory Board
No applications, no recruiter spam. Just the intro.
A few questions to make sure this role is the right shape for you. Two minutes.
I write the intro, send it to the founder, and handle the back-and-forth.
If they’re a yes, I book the chat. You show up — that’s the whole job-hunt.