About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The MBE Software Solutions and Architecture team is innovating at the intersection of hardware and software— Building co-optimized solutions for the most demanding AI data center challenges, reimagining the data- movement/storage/transformation/processing pipelines with purpose-built Marvell accelerators to advance next-generation AI infrastructure, and shaping open standards. What You Can Expect As Solutions Architect for Data Center Management & Control Plane, you will define the software architecture and technical direction for Marvell’s Integrated Management Control Processor (IMCP) platform — one of Marvell’s most strategically important infrastructure technologies. You will architect how hyperscale AI and cloud platforms manage security, telemetry, lifecycle orchestration, resiliency, and out-of-band infrastructure intelligence across next-generation server, storage, and networking environments. In this role, you will: Define the Architecture of Next-Generation Platform Management Own the end-to-end software and firmware architecture for the IMCP platform, spanning BMC integration, platform telemetry, security, lifecycle management, and connectivity Design reference architectures and solution blueprints that demonstrate IMCP capabilities to hyperscale cloud operators, OEM server and storage manufacturers, and ODM partners Drive alignment with emerging industry standards, including Redfish/Swordfish, IPMI, PLDM, MCTP, OpenBMC, OBMF, OCP initiatives, CXL management extensions, and Secure Root of Trust architectures Take full technical ownership of architecture decisions and their downstream impact on program milestones, silicon features, and customer deliverables Partner with Tier-1 Hyperscale Cloud Providers Serve as Marvell’s primary technical architect in engagements with Tier-1 hyperscale cloud operators, building trusted relationships at the staff and principal-engineer level within their platform and infrastructure teams Embed deeply in hyperscaler design cycles to understand their next-generation server, rack, and data-center management
requirements — translating those into concrete IMCP architecture proposals and integration designs Proactively identify emerging platform management pain points at hyperscale (fleet telemetry, firmware lifecycle, security posture, CXL fabric management) and position IMCP solutions ahead of formal RFQ/RFI processes Represent the voice of Tier-1 customers internally, ensuring that IMCP roadmap priorities, silicon feature trade-offs, and firmware investments are grounded in real hyperscaler
requirements Build deep technical relationships and establish Marvell as the trusted architecture partner for management and control plane solutions across OEM server and storage providers and networking customers Drive Internal Collaboration with IC Engineering Partner closely with IC design, verification, and silicon architecture teams to define management controller SoC
requirements — processing cores, memory subsystems, I/O interfaces, security engines, and connectivity blocks Translate customer-facing software and firmware architecture needs into actionable silicon feature
requirements, trade-off analyses, and PPA (performance, power, area) guidance Ensure tight, continuous feedback loops between customer solution needs, software architecture decisions, and the IC engineering roadmap Participate in silicon architecture reviews and design milestones to validate that management controller hardware features meet software-defined use cases and standards compliance
requirements Collaborate with IC validation and post-silicon teams to define management-plane bring-up strategies, firmware-first boot flows, and early platform integration test plans Take Technical Ownership of Program Success Serve as the single-threaded technical owner for IMCP platform programs — accountable for architecture integrity, technical risk identification, and on-time delivery from concept through production ramp Drive cross-functional technical execution across firmware, platform software, security, IC design, and validation teams, removing blockers and ensuring alignment on architecture and integration milestones Own the technical relationship with strategic customers through the full program lifecycle: architecture proposal → design win → silicon bring-up → firmware delivery → production qualification Establish and maintain architecture decision records, technical risk registers, and milestone scorecards that give leadership clear visibility into program health Personally drive resolution of critical cross-team technical issues that jeopardize program schedule or solution quality Drive Hyperscale and Cloud Solution Growth Architect high-value platform management solutions that win across current-generation and next-generation infrastructure programs Influence customer platform architecture decisions at the system and rack level Develop proof-of-concept implementations and reference designs that accelerate customer adoption Own Technical Thought Leadership Develop comprehensive technical collateral, including solution architectures, white papers, reference designs, and application notes for the IMCP portfolio Represent Marvell at industry conferences, standards bodies, and technical consortia Monitor competitive landscape and emerging standards (e.g., OCP, DMTF, CXL management extensions) to ensure Marvell’s IMCP architecture remains ahead of market
requirements Contribute to standards development efforts in OCP, DMTF, CXL Consortium, and other industry bodies to shape the future of platform management
What We're Looking For Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 19+ years of related professional experience. Master’s degree in Computer Science, Electrical Engineering or related fields with 17+ years of experience. PhD in Computer Science, Electrical Engineering or related fields with 12 -15 years of experience. Deep technical expertise in: BMC firmware and SoC architecture (design, integration, and deployment) Platform management software stacks (OpenBMC, OpenRMC, proprietary BMC firmware) Infrastructure telemetry pipelines (collection, aggregation, analytics) RAS (Reliability, Availability, Serviceability) frameworks and error-handling architectures Security subsystems, including Root of Trust, secure boot, attestation, and firmware signing Proven ability to define end-to-end software architecture for complex, multi-component embedded platforms Strong cross-functional collaboration skills — able to work with silicon design, firmware, platform software, and cloud/DevOps teams Experience authoring architecture specifications, design documents, and technical white papers Track record of delivering management/control-plane solutions that have shipped at hyperscale or large OEM/ODM volume Demonstrated experience engaging directly with Tier-1 hyperscale cloud providers to understand platform management
requirements and co-develop solutions Ability to take full technical ownership of program success — from architecture definition through silicon bring-up, firmware delivery, and customer deployment Proven ability to drive internal collaboration across IC engineering, firmware, software, and validation organisations to deliver integrated management controller solutions on schedule Ability to actively participate in and contribute to OCP working groups (e.g., OBMF, DC-MHS, DC-SCM) and related industry forums, representing Marvell’s technical interests and shaping emerging management platform standards Ability to collaborate with customers, open-source communities, and industry consortia to define new standards and author specifications for boot architecture, firmware design, platform security, and management interfaces Deep understanding of platform security as it pertains to boot architecture, secure boot flows, firmware integrity, and platform attestation frameworks; familiarity with emerging standards such as Caliptra (open-source Root of Trust), DICE, SPDM, and TCG TPM measurement architectures Expected Base Pay Range (USD) 224,990 - 337,100, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience,
qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional
Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive
benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected]. Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-JT2 Join our talent community to hear about company news, job openings and events. Join our Talent Community! Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Recruitment fraud is a well-known way that third parties try to get personal information or to steal money from you. Please review Marvell’s guidance here to learn more on how you can protect yourself.
Principal Engineer - Subsystem CoE Emulation
Senior Staff Engineer, Firmware Development
Software Engineer Intern
AVP , Chief Of Staff & Business Operations, Data Center Networking Groups
Digital Logic + Design Verification Graduate Co-Op Program (US - Fall 2026)
Salary
$224,990 - $337,100
Location
Santa Clara, United States of America
Experience
19+ years
Total raised
$90.0M
Last stage
Public
Investors
Sehat Sutardja
Co-Founder & CEO (Chairman)
Weili Dai
Co-Founder & President
Pantas Sutardja
Co-Founder
No applications, no recruiter spam. Just the intro.
A few questions to make sure this role is the right shape for you. Two minutes.
I write the intro, send it to the founder, and handle the back-and-forth.
If they’re a yes, I book the chat. You show up — that’s the whole job-hunt.