About the role
Develop, maintain, and support Physical Verification (PV) flows across all Silicon projects, spanning early design (shift‑left) through final signoff, including DRC, LVS, ERC, antenna, and advanced checks Work on PV‑related flow and design issues, including tool stability, runtime scalability, deck integration, waiver correctness, and cross‑tool debug. Participate in cross functional alignment with CAD, Technology, and external EDA partners to communicate PV
requirements, influence roadmap priorities, and unblock execution at critical project milestones. Support PDK and node enablement activities, ensuring PV flows are validated, production ready, and aligned with foundry decks and internal signoff criteria across multiple technology variants. Contribute to PV activities, including training material, documentation, onboarding labs, and continuous improvement of automation and debug infrastructure. Development and deployment of AI-enabled agents to automate and optimize Physical Verification (PV) and PERC workflows across the Silicon organization. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience. These
requirements include, but are not limited to, the following specialized security screenings: This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. BS + 7 years / MS + 5 years of relevant experience in Physical Verification, Physical Design, or CAD methodology roles. Strong hands-on experience with Physical Verification checks, including: Base and Metal DRC, LVS, ERC, Antenna, etc. Proficiency with industry standard PV tools, such as Calibre. Solid scripting skills in at least one language (TCL, Python, Perl, or equivalent) for flow automation, debug, and data analysis. Ability to debug complex, cross domain issues, reason about root cause (design vs flow vs tool), and drive issues to closure across teams. SVRF rule or deck enablement experience, including customization, and debug support. Experience with advanced verification checks, such as: PERC (including custom or CNOD based checks), ESD, EOS, level shifter, and reliability focused verification. Exposure to shift left PV methodologies, TCIC flows, and early-stage verification strategies that improve convergence and reduce late-stage surprises. Prior experience contributing to or leading PV, methodology councils, or multi project enablement efforts.
