Partcl is ending the hardware lottery.
We are developing the next generation of chip design automation tools with a focus on performance, scalability and productivity. We envision a future where hardware engineers benefit from advances in AI and believe the first place to start is with advanced optimization tools.
We are looking for extremely talented engineers who understand machine learning and systems at a deep level: engineers who can jump between performant architectures and CUDA kernels with ease, optimize inference pipelines, and develop systems that can grok terabytes of data in seconds.
At Partcl, we’re not here to play it safe - we’re here to win. We want people who wake up every day wanting to win too. If you are interested in solving massive-scale problems in physical AI, come join us.
What you will do:
Requirements:
We build GPU accelerated tools for chip designers. Our Electronic Design Automation (EDA) tools offer 1000x runtime improvements without degrading the quality of the output, thus achieving faster time to tapeout.
Salary
$130,000 - $300,000
Equity
0.5% - 2%
Location
San Francisco, CA, US
Experience
0+ years
Total raised
$5.0M
Last stage
Seed
Investors
No applications, no recruiter spam. Just the intro.
A few questions to make sure this role is the right shape for you. Two minutes.
I write the intro, send it to the founder, and handle the back-and-forth.
If they’re a yes, I book the chat. You show up — that’s the whole job-hunt.